Submission Open for 2024 |
Last Date of Submission : |
20th, March-2024 |
Acceptance Notification : |
After the Peer Review |
Last Date of Publication : |
30th, March-2024 |
Volume13 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
S.NO | TITLE | PAGE NO | DOWNLOAD | |
IJSETR 225 | Estimate by Bilateral Filters of Efficient MRF Energy Propagation for Video Segmentation Authors:B. R. VIKRAM, N. SANDEEP |
1253-1257 |
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IJSETR 226 | A Fuzzy Based Maximum Boost Controller Z-Source Inverter Fed Induction Motor Authors:G. YAMUNA, K. BHADRAJI |
1258-1263 |
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IJSETR 227 | Power Quality Improvement using D-STATCOM Based Modular Multi-Level Inverter for Wind Energy Systems Authors:C. SAI KRISHNA, V. KRUPA RANI, D. BHANU MURTHY |
1264-1269 |
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IJSETR 228 | Renewable Energy Sources of Voltage Multiplier Module with Closed loop DC-DC Converter for Grid Connected Authors:A. SITALAKSHMI, M. VAMSI SREE, GRANDHI RAMU |
1270-1276 |
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IJSETR 229 | A New Hybrid 7-Level Converter with Cascaded H-Bridge Cells Authors:DASARI TEJA, RAYUDU SRINIVAS |
1277-1282 |
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IJSETR 230 | Power Quality Improvement of Multi Level Inverter with Shunt Active Power Filter Authors:MUTYALA ADILAKSHMI DEVI, BANDARU LAVANYA |
1283-1288 |
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IJSETR 231 | Design and Simulation of Multi Level Inverter based DVR Authors:N. JASWANTH, P. RADHA KRISHNA |
1289-1294 |
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IJSETR 232 | PV Cell Fed High Step-up Interleaved Converter for Induction Motor Application Authors:M. RAKESH, V. KRUPA RANI, B. SUDHAKAR REDDY |
1295-1299 |
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IJSETR 233 | Reduced Power Electronic Components using Multi level Inverter with High Voltage Levels Authors:P. SATYA MURALI SAI, D. PRAKASA RAO, GRANDHI RAMU |
1300-1308 |
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IJSETR 234 | An Implementation of Watermarking Algorithm on FPGA using Soft-core Processor Design Authors:GUDIPALLY KAVYANATH REDDY, P. S. SREENIVASA REDDY |
1309-1313 |
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