Implementation of I2C Protocol by using Verilog HDL

Authors:T. NARESH, V. M. MITU

6450-6454

Design and Simulation of 16-Bit Wave Pipelined Sparse Tree RSFQ Adder

Authors:A. SRIVAKISHORE, V. M. MITU

6455-6459

Design and Synthesis of 32*32 Bit Multi-precision Reconfigurable Multiplier by using Verilog HDL

Authors:K. KARUNA, V. M. MITU

6460-6464

A Data Integrity Secure Audit Service by using TPA in Cloud System

Authors:SAIF KHALID MUSLUH, SHAIK TANVEER AHMED

6465-6468

A DOS for Dynamic and Auto Responsive Solution in ISP Network

Authors:ZINAH HUSSEIN TOMAN, SHAIK TANVEER AHMED

6469-6473

A Secured Cloud Storage Data with File Assured Deletion

Authors:ZAMMER LESHA, SHAIK TANVEER AHMED

6474-6476

Efficient Fixed-Point DRLMS Adaptive Filter With Low Adaptation-Delay

Authors:C. RADHIKA, M. VIJAYA LAXMI

6477-6482

A PPSPC Technique Cloud-Assisted Privacy Preserving for Mobile Health Monitoring

Authors:AHMED KHALDOON ABDULATEEF AHMED, S. SRAVANTHI

6483-6485

A New Security Primitive Based Hard AI Problems by using Captcha

Authors:HUSSEIN RADHI ZYARAH, MUNIGADAPA PURNA CHARY

6486-6489

A Secure Cloud Transaction to Balance Performance, Accuracy, and Precision

Authors:SALAM ALLAWI HUSSEIN, T. RAMDAS NAIK

6490-6496