Adaptive Hold Logic Reliable Multiplier Design Implementation on FPGA

Authors:M. MANIKANTA, M. CHITRA

2549-2554

A Protected Anti-Collusion Statistics Distribution System for Active Groups in the Cloud

Authors:K. NAGARJUNA REDDY, B. SIVA VISHNU MOHAN REDDY

2555-2558

Voice Recognition Wireless Home Automation System Based on Zigbee

Authors:G. MARUTHI, S. LOKESH

2559-2562

Design of Energy Efficient, High Speed, Low Power Ripple Carry Adder using GDI Technique

Authors:POORNIMA K. J, M. KRISHNA CHAITHANYA

2563-2568

Low Power High Speed Multiplier with Energy Efficient Full Adder using DPTAAL

Authors:A.RADHA, S. NAGARAJ

2569-2575

Increase the Capacity of Hybrid Wireless Networks by Distributed Three-Hop Routing Protocol

Authors:BARAKAT SAAD IBRAHIM, T. RAMDAS NAIK

2576-2583

High Speed Low-Complexity Butterfly Formed Weight Accumulator Based Architecture for Matching of Data Encoded With Systematic Error-Correcting Codes

Authors:YANAMALA RAJAMOULI, JOSEPH ANTHONY PRATHAP

2584-2589

Area-Delay-Power Efficient LMS (Least Mean Square) Based Adaptive Filter

Authors:K. RAKESH, J. MADAN KUMAR

2590-2593

ZIGBEE and PC Controlled Scrolling LED Message Display

Authors:T. R. REVANTH KUMAR, G. SURESH BABU

2594-2596

A Spatial Analysis on Human Population in Asifabad and Utnoor Revenue Divisions in Adilabad District, Telangana State

Authors:YASIR ABDULAMEER NAYYEF, ALI IBRAHIM ZGHAIR

2597-2602